Optical integrated circuits (OIC's) generally are fabricated on silicon wafers which are planar in structure. Several oxide layers are usually deposited on the wafers, and the integrated circuits themselves actually reside in the oxide layers. The usual practice is to form a plurality of such circuits on the wafer, and then to cut individual dies containing circuits therefrom (dicing). In use, optical signals carried by optical fibers are connected to the circuit on the silicon device, with the input signal entering the device at one end and exiting the device at the other end as an output signal, after processing by the integrated circuit. Connection of the fibers to the OIC die or chip involves an interface between each fiber and the chip, and it is common practice to terminate each fiber to be connected with a V-groove chip assembly made of silicon or ceramic which provides a means to align and attach the fibers to the inputs and outputs of the OIC chip. A 90.degree. end face on the silicon chip and on the OIC chip or die would be the easiest to align and attach. However, the flat 90.degree. faces would produce large amounts of back reflection, resulting in serious and highly undesirable signal degradation.
It is common practice in the prior art arrangements to impart an angle to the input or output face of the OIC die, and a corresponding complementary angle to the end of the V-groove terminating chip to minimize back reflection. The particular angle of the faces must be chosen with care to insure a proper physical connection and acceptable back reflection levels. Thus, the angle may vary from five (5.degree.) to twelve (12.degree.) degrees, for example, depending on the ultimate function of the OIC chip, but it has been found that eight degrees (8.degree.) is usually the minimum angle allowable to reduce back reflection to acceptable levels. Angles greater than eight degrees will reduce back reflection still more, but angles greater than ten (10) to twelve (12) degrees involve other manufacturing concerns, such as wastage of material, and, at least up to now, increased processing time which is economically undesirable. For angles less than eight degrees, back reflection increases rapidly, while for angles greater than twelve degrees, too much material has to be removed by current lapping and polishing processes, thus an angle range of approximately 8.degree. to 12.degree. is preferred.
Dicing, a commercially available process, has been used by the integrated circuit industry for many years, and has also been used in the manufacture of Optical Application Specific Integrated Circuits (OASIC) such as, for example, dense wavelength division multiplexers (DWDM's). Dicing usually involves the use of an abrasive-coated blade rotating at high speeds in the presence of a coolant fluid. Although the blade dimensions and characteristics may vary, typically the blade is planar and quite thin, with no included angle between the front and back faces of the blade. Such a rotating blade is used to separate individual OIC dies from the silicon wafer. It is a primary concern that the damage to the substrate that can result from this dicing operation be minimized. Such damage can result in poor device performance, or even catastrophic failure such as by fracture. Present day techniques for minimizing such damage call for making multiple cut passes in the same location using different blades. Thus, a beveled blade may be used to make a preliminary cut of less than full depth followed by a straight blade which makes the through cut. Angled blades typically leave less subsurface damage on the top surface of the wafer or die than do straight blades. Thus, a beveled blade makes a first cut which is wider than the following through-cut by a straight blade. The net effect of such a technique is a reduction in damage to the circuit substrate.
After the die or chip has been cut from the wafer, connector feet are mounted on the die and the rotating blade is used to trim the foot to the desired dimensions. The desired angular interface is then formed by lapping and polishing, which involves the use of an abrasive carrying slurry and some sort of mechanism to generate relative motion between the workpiece, e.g., the OASIC device, and a work surface, i.e., the lapping or polishing plate. The desired interface angle, such as eight degrees, is formed during the lapping and polishing, by the precise removal of material. The removal of material is a relatively slow process, and requires extensive training and a high level of skill on the part of the operator. For a smoothly operating production line, inclusion of an individual into the line, as with the prior art process, is, for the foregoing reasons, highly undesirable. In addition, the lapping and polishing equipment is both expensive and requires a high degree of maintenance, thereby adding to the cost involved in producing the desired end result. Furthermore, the process as thus far described requires several work stations and several operators with varying levels of required skill, thereby making the process, especially from a production standpoint, both slow and expensive. As will be discussed more fully hereinafter, the entire process involves approximately eleven steps extended over several hours which, in a production environment, means that the lapping and polishing steps govern the speed of the production line creating a most undesirable slow-down and a most undesirable increase in production costs.
In U.S. patent application Ser. No. 09/015,464 of Davies et al., filed Jan. 29, 1998, the disclosure of which is incorporated herein by reference, there is shown an apparatus and process for preparing optical integrated circuit dies or chips for connection and/or packaging, which drastically reduces the production time, number of involved personnel, and number of work stations that heretofore have been necessary, while at the same time, producing a uniformity of results that has not been a characteristic of prior art processes.
In the invention of that application, after a die containing the integrated circuit has been separated from the wafer, feet are mounted thereon, as by epoxy, to provide a matching surface for the V-groove chip terminations of the optical fibers. The die is then mounted to, preferably, a tape mount, which is commonly used in the prior art. After mounting, the die and foot are cut by a rotating beveled blade having an included angle of from sixteen to twenty-four degrees, thereby forming an eight to twelve degree angle on the end faces of the die and the foot, after which the mounting tape is removed from the completed die. It has been found that such an angled blade produces operative faces of exceptional smoothness.
The elapsed time for performance of the entire process of that invention is an order of magnitude less than for the prior art process, as will become clear hereinafter, and acceptable operative end faces are produced. It has been found, however, that, in a high production environment, a beveled blade sometimes acquires a non-planar profile after cutting several devices, primarily due to the different layers of material encountered during the cutting operation. When this does occur, the blade has to be replaced, necessitating a temporary halt in the production process.